Intel Embedded CPU v0.0.1
Intel Celeron Processor P1053
Metadata
| Property | Value |
|---|---|
| Brand | Celeron |
| Intel name | Intel Celeron Processor P1053 |
| Processor number | P1053 |
| Codename | Jasper Forest |
| Generation | 1st generation Core |
| Microarchitecture | Nehalem / Westmere |
| Performance class | Celeron |
| Segment | Embedded |
| Released | 2010-Q12010 |
| Status | Discontinued |
| Cores | 1 |
| Threads | 2 |
| Base clock | 1.33 GHz |
| Cache | 2 MB L3 Cache |
| Bus | 0 |
| TDP | 30 W |
| Lithography (as published) | 45 nm |
| Memory channels | 2 |
| PCIe revision | 2.0 |
| Max CPUs per system | 1 |
| Instruction set | 64-bit |
| Socket | FCLGA1366LGA1366 |
| Memory | DDR3 800DDR3 |
| Recommended price | $153 |
| Instruction sets | |
| Features | |
| Source | Intel ARK (via cpu-spec-dataset) |
Uses (dependencies)
- lithography: Intel Lithography
v13.0.0(45 nm) - simd: Intel SIMD
v0.0.1(MMX) - simd: Intel SIMD
v1.4.1(SSE4.2)
Used by (0)
Nothing depends on this version.
Known vulnerabilities and defects
- Meltdown (CVE-2017-5754): Rogue data cache load: user code can read kernel memory through speculative execution.
- Spectre variant 1 (bounds check bypass) (CVE-2017-5753): Mistrained conditional branches speculatively read out-of-bounds data. Mitigated in software only; every speculative out-of-order core is affected.
- Foreshadow / L1 Terminal Fault (CVE-2018-3615, CVE-2018-3620, CVE-2018-3646): Speculative reads from the L1 data cache through non-present page table entries, breaking SGX, OS and VMM isolation.
- Microarchitectural Data Sampling (ZombieLoad, RIDL, Fallout) (CVE-2018-12126, CVE-2018-12127, CVE-2018-12130, CVE-2019-11091): Data in store buffers, fill buffers and load ports leaks across privilege boundaries.
Matched by codename; individual steppings may differ.
Changelog
This is the first release of Intel Embedded CPU.
Raw source data
Show all 35 fields
| Field | Value |
|---|---|
| CpuId | 47647 |
| CpuName | Intel Celeron Processor P1053 |
| BornOnDate | Q1'10 |
| Bus | 0 |
| BusNumPorts | 0 |
| Cache | 2 MB L3 Cache |
| CertifiedUseConditions | Communications |
| ClockSpeed | 1.33 GHz |
| CodeNameText | Products formerly Jasper Forest |
| CoreCount | 1 |
| ECCMemory | Yes |
| Embedded | Yes |
| ExecuteDisable | Yes |
| HaltState | Yes |
| HyperThreading | Yes |
| InstructionSet | 64-bit |
| Lithography | 45 nm |
| MarketSegment | Embedded |
| MaxCPUs | 1 |
| MaxTDP | 30 W |
| MemoryTypes | DDR3 800 |
| NumMemoryChannels | 2 |
| PCIExpressRevision | 2.0 |
| ProcessorNumber | P1053 |
| ProductGroup | Legacy Intel Celeron Processor |
| ServicingStatus | End of Servicing Lifetime |
| SocketsSupported | FCLGA1366 |
| SpeedstepTechnology | Yes |
| StatusCodeText | Discontinued |
| TBTVersion | No |
| TCase | 64.4°C |
| ThreadCount | 2 |
| VTD | Yes |
| VTX | Yes |
| SourceUrl | https://ark.intel.com/content/www/us/en/ark/products/47647/intel-celeron-processor-p1053-2m-cache-1-33-ghz.html |