Intel Server CPU v11.3.4-T
Intel Xeon Silver 4114T Processor
patch
4
Xeon Silver 4114T
Metadata
| Property | Value |
|---|---|
| Brand | Xeon |
| Intel name | Intel Xeon Silver 4114T Processor |
| Processor number | 4114T |
| Codename | Skylake |
| Generation | Skylake (Xeon Scalable 1st gen) |
| Microarchitecture | Skylake |
| Performance class | Xeon Silver |
| Segment | Server |
| Released | 2017-Q32017 |
| Status | Launched |
| Cores | 10 |
| Threads | 20 |
| Base clock | 2.20 GHz |
| Max clock | 3.00 GHz |
| Cache | 13.75 MB L3 Cache |
| TDP | 85 W |
| Lithography (as published) | 14 nm |
| Max memory | 768 GB |
| Memory channels | 6 |
| PCIe revision | 3.0 |
| PCIe lanes | 48 |
| Socket | FCLGA3647LGA3647 |
| Memory | DDR4-2400DDR4 |
| Recommended price | $773 |
| Instruction sets | |
| Features | |
| Source | Intel ARK (via cpu-spec-dataset) |
Uses (dependencies)
- lithography: Intel Lithography
v16.0.0(14 nm) - simd: Intel SIMD
v0.0.1(MMX) - simd: Intel SIMD
v1.4.1(SSE4.2) - simd: Intel SIMD
v2.2.0(AVX-512)
Used by (0)
Nothing depends on this version.
Other variants of this version
- Intel Server CPU
v11.3.4(Xeon Silver 4114)
Known vulnerabilities and defects
- Meltdown (CVE-2017-5754): Rogue data cache load: user code can read kernel memory through speculative execution.
- Spectre variant 1 (bounds check bypass) (CVE-2017-5753): Mistrained conditional branches speculatively read out-of-bounds data. Mitigated in software only; every speculative out-of-order core is affected.
- Foreshadow / L1 Terminal Fault (CVE-2018-3615, CVE-2018-3620, CVE-2018-3646): Speculative reads from the L1 data cache through non-present page table entries, breaking SGX, OS and VMM isolation.
- Microarchitectural Data Sampling (ZombieLoad, RIDL, Fallout) (CVE-2018-12126, CVE-2018-12127, CVE-2018-12130, CVE-2019-11091): Data in store buffers, fill buffers and load ports leaks across privilege boundaries.
- Special Register Buffer Data Sampling (CrossTalk) (CVE-2020-0543): RDRAND/RDSEED results leak across cores through a shared staging buffer.
- Retbleed (CVE-2022-29901): Return instructions are hijacked through the branch target buffer on cores without enhanced IBRS.
- Downfall / Gather Data Sampling (CVE-2022-40982): The AVX gather instruction leaks stale data from internal vector registers.
Matched by codename; individual steppings may differ.
Changelog
Compared with the base variant: Intel Server CPU v11.3.4 (Xeon Silver 4114)
Specifications
- ~Recommended price: $694 → $773
Since the previous patch: Intel Server CPU v11.3.3 (Xeon Silver 4112)
Specifications
- ~Cores: 4 → 10
- ~Threads: 8 → 20
- ~Base clock: 2.60 GHz → 2.20 GHz
- ~Cache: 8.25 MB L3 Cache → 13.75 MB L3 Cache
- ~Recommended price: $473 → $773
Since the previous minor (lower performance class): Intel Server CPU v11.2.4 (Xeon E3-1240 v5)
Breaking changes
- ~Socket changed from FCLGA1151 to FCLGA3647
- −Removed SGX
Components
Instruction sets
- +AVX-512
Features
- +Speed Shift
- +Mode-based Execute Control
- −Secure Key (RDRAND)
- −Turbo Boost 2.0
- −SGX
- −MPX
Specifications
- ~Cores: 4 → 10
- ~Threads: 8 → 20
- ~Base clock: 3.50 GHz → 2.20 GHz
- ~Max clock: 3.90 GHz → 3.00 GHz
- ~Cache: 8 MB Intel Smart Cache → 13.75 MB L3 Cache
- ~TDP: 80 W → 85 W
- ~Max memory: 64 GB → 768 GB
- ~Memory channels: 2 → 6
- ~PCIe lanes: 16 → 48
- ~Recommended price: $272 → $773
- −Bus: 8 GT/s
- −Max CPUs per system: 1
- −Instruction set: 64-bit
Since the previous major (previous generation): Intel Server CPU v10.3.4 (Xeon E5-1680 v4)
Breaking changes
- ~Socket changed from FCLGA2011-3 to FCLGA3647
Security
- !Introduced: Downfall / Gather Data Sampling
Components
Instruction sets
- +AVX-512
Features
- +Speed Shift
- +Mode-based Execute Control
- −Secure Key (RDRAND)
- −Physical Address Extension
- −Turbo Boost Max 3.0
- −Identity Protection Technology
- −Demand Based Switching
Specifications
- ~Codename: Broadwell → Skylake
- ~Microarchitecture: Broadwell → Skylake
- ~Cores: 8 → 10
- ~Threads: 16 → 20
- ~Base clock: 3.40 GHz → 2.20 GHz
- ~Max clock: 4.00 GHz → 3.00 GHz
- ~Cache: 20 MB → 13.75 MB L3 Cache
- ~TDP: 140 W → 85 W
- ~Max memory: 1.5 TB → 768 GB
- ~Memory channels: 4 → 6
- ~PCIe lanes: 40 → 48
- ~Recommended price: $1,723 → $773
- −Bus: 0 GT/s
- −Max CPUs per system: 1
- −Instruction set: 64-bit
Raw source data
Show all 54 fields
| Field | Value |
|---|---|
| CpuId | 126153 |
| CpuName | Intel Xeon Silver 4114T Processor |
| AdditionalInfoUrl | View now |
| AESTech | Yes |
| AVX512FusedMultiplyAddUnits | 1 |
| BornOnDate | Q3'17 |
| Cache | 13.75 MB L3 Cache |
| CertifiedUseConditions | Communications |
| ClockSpeed | 2.20 GHz |
| ClockSpeedMax | 3.00 GHz |
| CodeNameText | Products formerly Skylake |
| CoreCount | 10 |
| ECCMemory | Yes |
| EM64 | Yes |
| Embedded | Yes |
| EOISDate | Sunday. December 31. 2023 |
| ESUDate | Sunday. December 31. 2023 |
| ExecuteDisable | Yes |
| ExtendedPageTables | Yes |
| HyperThreading | Yes |
| InstructionSetExtensions | Intel SSE4.2. Intel AVX. Intel AVX2. Intel AVX-512 |
| Lithography | 14 nm |
| MarketSegment | Server |
| MaxMem | 768 GB |
| MaxTDP | 85 W |
| MemoryMaxSpeedMhz | 2400 MHz |
| MemoryTypes | DDR4-2400 |
| ModeBasedExecutionControlVersion | Yes |
| NumMemoryChannels | 6 |
| NumPCIExpressPorts | 48 |
| OptaneMemorySupport | No |
| PackageSize | 76.0mm x 56.5mm |
| PCIExpressRevision | 3.0 |
| ProcessorNumber | 4114T |
| ProductBriefUrl | View now |
| ProductGroup | Intel Xeon Scalable Processors |
| ScalableSockets | 2S |
| ServicingStatus | ESU Notification Issued |
| SocketsSupported | FCLGA3647 |
| SpeedShiftTechVersion | Yes |
| SpeedstepTechnology | Yes |
| StatusCodeText | Launched |
| TBTVersion | 2.0 |
| TCase | 92°C |
| ThreadCount | 20 |
| TransactionalSynchronizationExtensionVersion | Yes |
| TurboBoostMaxTechVersion | No |
| TXT | Yes |
| UltraPathInterconnectLinks | 2 |
| VolumeManagementDeviceVersion | Yes |
| VProTechnologyOptions | Intel vPro Platform |
| VTD | Yes |
| VTX | Yes |
| SourceUrl | https://ark.intel.com/content/www/us/en/ark/products/126153/intel-xeon-silver-4114t-processor-13-75m-cache-2-20-ghz.html |