Intel Server CPU v7.0.0-C
Intel Xeon Processor E3-1105C
patch
0
Xeon E3-1105C
Metadata
| Property | Value |
|---|---|
| Brand | Xeon |
| Intel name | Intel Xeon Processor E3-1105C |
| Processor number | E3-1105C |
| Codename | Gladden |
| Generation | Sandy Bridge |
| Microarchitecture | Sandy Bridge |
| Performance class | Xeon E3 |
| Segment | Embedded |
| Released | 2012-Q22012 |
| Status | Discontinued |
| Cores | 4 |
| Threads | 8 |
| Base clock | 1.00 GHz |
| Cache | 6 MB L3 Cache |
| TDP | 25 W |
| Max memory | 32 GB |
| Memory channels | 2 |
| PCIe revision | 2 |
| PCIe lanes | 20 |
| Instruction set | 64-bit |
| Socket | FCBGA1284BGA1284 |
| Memory | DDR3 1066/1333/1600DDR3 |
| Recommended price | $389 |
| Instruction sets | |
| Features | |
| Source | Intel ARK (via cpu-spec-dataset) |
Uses (dependencies)
- simd: Intel SIMD
v0.0.1(MMX) - simd: Intel SIMD
v1.4.1(SSE4.2) - simd: Intel SIMD
v2.0.0(AVX)
Used by (0)
Nothing depends on this version.
Known vulnerabilities and defects
- Meltdown (CVE-2017-5754): Rogue data cache load: user code can read kernel memory through speculative execution.
- Spectre variant 1 (bounds check bypass) (CVE-2017-5753): Mistrained conditional branches speculatively read out-of-bounds data. Mitigated in software only; every speculative out-of-order core is affected.
- Foreshadow / L1 Terminal Fault (CVE-2018-3615, CVE-2018-3620, CVE-2018-3646): Speculative reads from the L1 data cache through non-present page table entries, breaking SGX, OS and VMM isolation.
- Microarchitectural Data Sampling (ZombieLoad, RIDL, Fallout) (CVE-2018-12126, CVE-2018-12127, CVE-2018-12130, CVE-2019-11091): Data in store buffers, fill buffers and load ports leaks across privilege boundaries.
Matched by codename; individual steppings may differ.
Changelog
Since the previous major (previous generation): Intel Server CPU v6.0.0 (Xeon L3406)
Breaking changes
- ~Socket changed from FCLGA1156 to FCBGA1284
Components
Instruction sets
- +AVX
Features
- +AES-NI
- −Physical Address Extension
- −Demand Based Switching
Specifications
- ~Codename: Clarkdale → Gladden
- ~Microarchitecture: Westmere → Sandy Bridge
- ~Cores: 2 → 4
- ~Threads: 4 → 8
- ~Base clock: 2.26 GHz → 1.00 GHz
- ~Cache: 4 MB Intel Smart Cache → 6 MB L3 Cache
- ~TDP: 30 W → 25 W
- ~Max memory: 16.38 GB → 32 GB
- ~PCIe revision: 2.0 → 2
- ~PCIe lanes: 16 → 20
- ~Recommended price: $201 → $389
- −Max clock: 2.53 GHz
- −Bus: 2.5 GT/s
- −Max CPUs per system: 1
- −Transistors: 382 million
- −Die size: 81 mm2
Raw source data
Show all 45 fields
| Field | Value |
|---|---|
| CpuId | 68331 |
| CpuName | Intel Xeon Processor E3-1105C |
| AESTech | Yes |
| BornOnDate | Q2'12 |
| Cache | 6 MB L3 Cache |
| CertifiedUseConditions | Communications |
| ClockSpeed | 1.00 GHz |
| CodeNameText | Products formerly Gladden |
| CoreCount | 4 |
| ECCMemory | Yes |
| EM64 | Yes |
| Embedded | Yes |
| ESUDate | Tuesday. December 31. 2019 |
| ExecuteDisable | Yes |
| ExtendedPageTables | Yes |
| FastMemoryTechnology | Yes |
| FlexMemoryTechnology | Yes |
| HaltState | Yes |
| HyperThreading | Yes |
| InstructionSet | 64-bit |
| InstructionSetExtensions | Intel AVX |
| MarketSegment | Embedded |
| MaxMem | 32 GB |
| MaxMemoryBandwidth | 25.6 GB/s |
| MaxTDP | 25 W |
| MemoryTypes | DDR3 1066/1333/1600 |
| NumMemoryChannels | 2 |
| NumPCIExpressPorts | 20 |
| PackageSize | 37.5mm x 37.5 mm |
| PCIExpressConfigs | 1x16 1x4 or 2x8 1x4 or 1x8 3x4 |
| PCIExpressRevision | 2 |
| ProcessorNumber | E3-1105C |
| ProductGroup | Intel Xeon Processor E3 Family |
| ServicingStatus | End of Servicing Lifetime |
| SocketsSupported | FCBGA1284 |
| SpeedstepTechnology | Yes |
| StatusCodeText | Discontinued |
| TBTVersion | No |
| ThermalJunctionRateCode | 100°C |
| ThermalMonitoring2Indicator | Yes |
| ThreadCount | 8 |
| TXT | Yes |
| VTD | Yes |
| VTX | Yes |
| SourceUrl | https://ark.intel.com/content/www/us/en/ark/products/68331/intel-xeon-processor-e31105c-6m-cache-1-00-ghz.html |