Intel Server CPU v7.2.32
Intel Xeon Processor E5-4607
Metadata
| Property | Value |
|---|---|
| Brand | Xeon |
| Intel name | Intel Xeon Processor E5-4607 |
| Processor number | E5-4607 |
| Codename | Sandy Bridge EP |
| Generation | Sandy Bridge |
| Microarchitecture | Sandy Bridge |
| Performance class | Xeon E5 |
| Segment | Server |
| Released | 2012-Q22012 |
| Status | Discontinued |
| Cores | 6 |
| Threads | 12 |
| Base clock | 2.20 GHz |
| Cache | 12 MB Intel Smart Cache |
| Bus | 6.4 GT/s |
| TDP | 95 W |
| Lithography (as published) | 32 nm |
| Max memory | 384 GB |
| Memory channels | 4 |
| PCIe revision | 3.0 |
| PCIe lanes | 40 |
| Max CPUs per system | 4 |
| Instruction set | 64-bit |
| Socket | FCLGA2011LGA2011 |
| Memory | DDR3 800/1066DDR3 |
| Recommended price | $885 |
| Instruction sets | |
| Features | |
| Source | Intel ARK (via cpu-spec-dataset) |
Uses (dependencies)
- lithography: Intel Lithography
v14.0.0(32 nm) - simd: Intel SIMD
v0.0.1(MMX) - simd: Intel SIMD
v1.4.1(SSE4.2) - simd: Intel SIMD
v2.0.0(AVX)
Used by (0)
Nothing depends on this version.
Known vulnerabilities and defects
- Meltdown (CVE-2017-5754): Rogue data cache load: user code can read kernel memory through speculative execution.
- Spectre variant 1 (bounds check bypass) (CVE-2017-5753): Mistrained conditional branches speculatively read out-of-bounds data. Mitigated in software only; every speculative out-of-order core is affected.
- Foreshadow / L1 Terminal Fault (CVE-2018-3615, CVE-2018-3620, CVE-2018-3646): Speculative reads from the L1 data cache through non-present page table entries, breaking SGX, OS and VMM isolation.
- Microarchitectural Data Sampling (ZombieLoad, RIDL, Fallout) (CVE-2018-12126, CVE-2018-12127, CVE-2018-12130, CVE-2019-11091): Data in store buffers, fill buffers and load ports leaks across privilege boundaries.
Matched by codename; individual steppings may differ.
Changelog
Since the previous patch: Intel Server CPU v7.2.31 (Xeon E5-4603)
Specifications
- ~Cores: 4 → 6
- ~Threads: 8 → 12
- ~Base clock: 2.00 GHz → 2.20 GHz
- ~Cache: 10 MB Intel Smart Cache → 12 MB Intel Smart Cache
- ~Recommended price: $551 → $885
Since the previous minor (lower performance class): Intel Server CPU v7.1.0 (Pentium 1405)
Breaking changes
- ~Socket changed from FCLGA1356 to FCLGA2011
Features
- +Hyper-Threading
- −vPro
Specifications
- ~Codename: Sandy Bridge EN → Sandy Bridge EP
- ~Cores: 2 → 6
- ~Threads: 2 → 12
- ~Base clock: 1.20 GHz → 2.20 GHz
- ~Cache: 5 MB Intel Smart Cache → 12 MB Intel Smart Cache
- ~Bus: 0 GT/s → 6.4 GT/s
- ~TDP: 40 W → 95 W
- ~Max memory: 375 GB → 384 GB
- ~Memory channels: 2 → 4
- ~PCIe lanes: 24 → 40
- ~Max CPUs per system: 1 → 4
- +Recommended price: $885
- −Max clock: 1.80 GHz
Since the previous major (previous generation): Intel Server CPU v6.2.17 (Xeon E7-8870)
Breaking changes
- ~Socket changed from LGA1567 to FCLGA2011
Components
Instruction sets
- +AVX
Features
- +Demand Based Switching
Specifications
- ~Codename: Westmere EX → Sandy Bridge EP
- ~Microarchitecture: Westmere → Sandy Bridge
- ~Cores: 10 → 6
- ~Threads: 20 → 12
- ~Base clock: 2.40 GHz → 2.20 GHz
- ~Cache: 30 MB Intel Smart Cache → 12 MB Intel Smart Cache
- ~TDP: 130 W → 95 W
- ~Max memory: 4 TB → 384 GB
- +PCIe revision: 3.0
- +PCIe lanes: 40
- ~Max CPUs per system: 8 → 4
- ~Recommended price: $4,616 → $885
- −Max clock: 2.80 GHz
Raw source data
Show all 49 fields
| Field | Value |
|---|---|
| CpuId | 64604 |
| CpuName | Intel Xeon Processor E5-4607 |
| AESTech | Yes |
| BornOnDate | Q2'12 |
| Bus | 6.4 GT/s |
| BusNumPorts | 2 |
| Cache | 12 MB Intel Smart Cache |
| ClockSpeed | 2.20 GHz |
| CodeNameText | Products formerly Sandy Bridge EP |
| CoreCount | 6 |
| DemandBasedSwitching | Yes |
| ECCMemory | Yes |
| EM64 | Yes |
| Embedded | No |
| ESUDate | Tuesday. June 30. 2020 |
| ExecuteDisable | Yes |
| ExpectedDiscontinuanceDate | Q2'15 |
| ExtendedPageTables | Yes |
| FlexMemoryTechnology | No |
| HaltState | Yes |
| HyperThreading | Yes |
| IdentityProtectionTechVersion | No |
| InstructionSet | 64-bit |
| InstructionSetExtensions | Intel AVX |
| Lithography | 32 nm |
| MarketSegment | Server |
| MaxCPUs | 4 |
| MaxMem | 384 GB |
| MaxMemoryBandwidth | 34.1 GB/s |
| MaxTDP | 95 W |
| MemoryTypes | DDR3 800/1066 |
| NumMemoryChannels | 4 |
| NumPCIExpressPorts | 40 |
| PackageSize | 52.5mm x 45.0mm |
| PCIExpressRevision | 3.0 |
| ProcessorNumber | E5-4607 |
| ProductGroup | Intel Xeon Processor E5 Family |
| ScalableSockets | 4S Only |
| ServicingStatus | End of Servicing Lifetime |
| SocketsSupported | FCLGA2011 |
| SpeedstepTechnology | Yes |
| StatusCodeText | Discontinued |
| TBTVersion | No |
| ThermalMonitoring2Indicator | Yes |
| ThreadCount | 12 |
| TXT | Yes |
| VTD | Yes |
| VTX | Yes |
| SourceUrl | https://ark.intel.com/content/www/us/en/ark/products/64604/intel-xeon-processor-e54607-12m-cache-2-20-ghz-6-40-gts-intel-qpi.html |