Intel CPU v8.0.0
Intel Celeron Processor 1.70 GHz, 128K Cache, 400 MHz FSB
patch
0
Celeron 1.70 GHz, 128K Cache, 400 MHz FSB
suffix
—
No suffix
Metadata
| Property | Value |
|---|---|
| Brand | Celeron |
| Intel name | Intel Celeron Processor 1.70 GHz, 128K Cache, 400 MHz FSB |
| Codename | Northwood |
| Generation | NetBurst (Pentium 4) |
| Microarchitecture | NetBurst |
| Performance class | Celeron |
| Segment | Desktop |
| Released | 2002-Q12002 |
| Status | Discontinued |
| Cores | 1 |
| Base clock | 1.70 GHz |
| Cache | 128 KB L2 Cache |
| Bus | 400 MHz |
| TDP | 63.5 W |
| Lithography (as published) | 130 nm |
| Transistors | 55 million |
| Die size | 131 mm2 |
| Instruction set | 32-bit |
| Socket | PPGA478PGA478 |
| Instruction sets | |
| Features | |
| Source | Intel ARK (via cpu-spec-dataset) |
Uses (dependencies)
- lithography: Intel Lithography
v10.0.0(130 nm) - simd: Intel SIMD
v0.0.1(MMX) - simd: Intel SIMD
v1.1.0(SSE2)
Used by (0)
Nothing depends on this version.
Known vulnerabilities and defects
- Meltdown (CVE-2017-5754): Rogue data cache load: user code can read kernel memory through speculative execution.
- Spectre variant 1 (bounds check bypass) (CVE-2017-5753): Mistrained conditional branches speculatively read out-of-bounds data. Mitigated in software only; every speculative out-of-order core is affected.
Matched by codename; individual steppings may differ.
Changelog
Since the previous major (previous generation): Intel CPU v7.0.0 (Celeron (Covington))
Breaking changes
- ~Socket changed from Slot 1 to PPGA478
Instruction sets
- +SSE
- +SSE2
Features
- −Protected mode
- −Memory management unit
- −32-bit (IA-32)
- −Paging
- −Virtual 8086 mode
- −On-die L1 cache
- −On-die x87 FPU
- −Out-of-order execution
Specifications
- ~Codename: Covington → Northwood
- ~Microarchitecture: P6 (out-of-order) → NetBurst
- +Cores: 1
- ~Base clock: 266 MHz → 1.70 GHz
- ~Cache: 32 KB L1, no L2 → 128 KB L2 Cache
- +Bus: 400 MHz
- +TDP: 63.5 W
- ~Transistors: 7,500,000 → 55 million
- +Die size: 131 mm2
- +Instruction set: 32-bit
- −Data width: 32-bit
- −Address width: 36-bit
- −Max clock: 300 MHz
Raw source data
Show all 35 fields
| Field | Value |
|---|---|
| CpuId | 27172 |
| CpuName | Intel Celeron Processor 1.70 GHz, 128K Cache, 400 MHz FSB |
| BornOnDate | Q1'02 |
| Bus | 400 MHz |
| Cache | 128 KB L2 Cache |
| ClockSpeed | 1.70 GHz |
| CodeNameText | Products formerly Northwood |
| CoreCount | 1 |
| CoreVoltage | 1.75V |
| DemandBasedSwitching | No |
| DieSize | 131 mm2 |
| ECCMemory | No |
| EM64 | No |
| Embedded | No |
| ExecuteDisable | No |
| FSBParity | No |
| HaltState | No |
| HyperThreading | No |
| InstructionSet | 32-bit |
| Lithography | 130 nm |
| MarketSegment | Desktop |
| MaxTDP | 63.5 W |
| PackageSize | 35mm x 35mm |
| PhysicalAddressExtension | 32-bit |
| ProductGroup | Legacy Intel Celeron Processor |
| ServicingStatus | End of Servicing Lifetime |
| SocketsSupported | PPGA478 |
| SpeedstepTechnology | No |
| StatusCodeText | Discontinued |
| TBTVersion | No |
| TCase | 76°C |
| TransistorCount | 55 million |
| TXT | No |
| VTX | No |
| SourceUrl | https://ark.intel.com/content/www/us/en/ark/products/27172/intel-celeron-processor-1-70-ghz-128k-cache-400-mhz-fsb.html |