Intel Mobile CPU v0.0.1

Mobile Intel Celeron Processor LV 650 MHz, 256K Cache, 100 MHz FSB

major
0
P6 (Pentium Pro/II/III)
minor
0
Celeron
patch
1
Mobile Celeron LV 650 MHz, 256K Cache, 100 MHz FSB
suffix
—
No suffix

Metadata

PropertyValue
BrandCeleron
Intel nameMobile Intel Celeron Processor LV 650 MHz, 256K Cache, 100 MHz FSB
CodenameTualatin
GenerationP6 (Pentium Pro/II/III)
MicroarchitectureP6 (out-of-order)
Performance classCeleron
SegmentMobile
Released2001-Q42001
StatusDiscontinued
Cores1
Base clock650 MHz
Cache256 KB
Bus100 MHz
TDP8.3 W
Lithography (as published)130 nm
Transistors44 million
Die size80 mm2
Instruction set32-bit
SocketH-PBGA479
Instruction sets
SourceIntel ARK (via cpu-spec-dataset)

Uses (dependencies)

Used by (0)

Nothing depends on this version.

Known vulnerabilities and defects

  • Meltdown (CVE-2017-5754): Rogue data cache load: user code can read kernel memory through speculative execution.
  • Spectre variant 1 (bounds check bypass) (CVE-2017-5753): Mistrained conditional branches speculatively read out-of-bounds data. Mitigated in software only; every speculative out-of-order core is affected.

Matched by codename; individual steppings may differ.

Changelog

This is the first release of Intel Mobile CPU.

Raw source data

Show all 23 fields
FieldValue
CpuId27338
CpuNameMobile Intel Celeron Processor LV 650 MHz, 256K Cache, 100 MHz FSB
BornOnDateQ4'01
Bus100 MHz
Cache256 KB
ClockSpeed650 MHz
CodeNameTextProducts formerly Tualatin
CoreCount1
CoreVoltage1.1V
DieSize80 mm2
EmbeddedYes
FSBParityNo
InstructionSet32-bit
Lithography130 nm
MarketSegmentMobile
MaxTDP8.3 W
ProductGroupLegacy Intel Celeron Processor
ServicingStatusEnd of Servicing Lifetime
SocketsSupportedH-PBGA479
StatusCodeTextDiscontinued
ThermalJunctionRateCode100°C
TransistorCount44 million
SourceUrlhttps://ark.intel.com/content/www/us/en/ark/products/27338/mobile-intel-celeron-processor-lv-650-mhz-256k-cache-100-mhz-fsb.html