Intel Mobile CPU v1.0.0
Mobile Intel Celeron Processor 1.20 GHz, 256K Cache, 400 MHz FSB
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Mobile Celeron 1.20 GHz, 256K Cache, 400 MHz FSB
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Metadata
| Property | Value |
|---|---|
| Brand | Celeron |
| Intel name | Mobile Intel Celeron Processor 1.20 GHz, 256K Cache, 400 MHz FSB |
| Codename | Northwood |
| Generation | NetBurst (Pentium 4) |
| Microarchitecture | NetBurst |
| Performance class | Celeron |
| Segment | Mobile |
| Released | 2002-Q12002 |
| Status | Discontinued |
| Cores | 1 |
| Base clock | 1.20 GHz |
| Cache | 256 KB L2 Cache |
| Bus | 400 MHz |
| TDP | 20.8 W |
| Lithography (as published) | 130 nm |
| Transistors | 55 million |
| Die size | 131 mm2 |
| Instruction set | 32-bit |
| Socket | PPGA478PGA478 |
| Instruction sets | |
| Source | Intel ARK (via cpu-spec-dataset) |
Uses (dependencies)
- lithography: Intel Lithography
v10.0.0(130 nm) - simd: Intel SIMD
v0.0.1(MMX) - simd: Intel SIMD
v1.1.0(SSE2)
Used by (0)
Nothing depends on this version.
Known vulnerabilities and defects
- Meltdown (CVE-2017-5754): Rogue data cache load: user code can read kernel memory through speculative execution.
- Spectre variant 1 (bounds check bypass) (CVE-2017-5753): Mistrained conditional branches speculatively read out-of-bounds data. Mitigated in software only; every speculative out-of-order core is affected.
Matched by codename; individual steppings may differ.
Changelog
Since the previous major (previous generation): Intel Mobile CPU v0.0.1 (Mobile Celeron LV 650 MHz, 256K Cache, 100 MHz FSB)
Breaking changes
- ~Socket changed from H-PBGA479 to PPGA478
Components
Instruction sets
- +SSE2
Specifications
- ~Codename: Tualatin → Northwood
- ~Microarchitecture: P6 (out-of-order) → NetBurst
- ~Base clock: 650 MHz → 1.20 GHz
- ~Cache: 256 KB → 256 KB L2 Cache
- ~Bus: 100 MHz → 400 MHz
- ~TDP: 8.3 W → 20.8 W
- ~Transistors: 44 million → 55 million
- ~Die size: 80 mm2 → 131 mm2
Raw source data
Show all 33 fields
| Field | Value |
|---|---|
| CpuId | 27309 |
| CpuName | Mobile Intel Celeron Processor 1.20 GHz, 256K Cache, 400 MHz FSB |
| BornOnDate | Q1'02 |
| Bus | 400 MHz |
| Cache | 256 KB L2 Cache |
| ClockSpeed | 1.20 GHz |
| CodeNameText | Products formerly Northwood |
| CoreCount | 1 |
| CoreVoltage | 1.3V |
| DemandBasedSwitching | No |
| DieSize | 131 mm2 |
| EM64 | No |
| Embedded | Yes |
| ExecuteDisable | No |
| FSBParity | No |
| HaltState | No |
| HyperThreading | No |
| InstructionSet | 32-bit |
| Lithography | 130 nm |
| MarketSegment | Mobile |
| MaxTDP | 20.8 W |
| PackageSize | 35mm x 35mm |
| ProductGroup | Legacy Intel Celeron Processor |
| ServicingStatus | End of Servicing Lifetime |
| SocketsSupported | PPGA478 |
| SpeedstepTechnology | No |
| StatusCodeText | Discontinued |
| TBTVersion | No |
| ThermalJunctionRateCode | 100°C |
| TransistorCount | 55 million |
| TXT | No |
| VTX | No |
| SourceUrl | https://ark.intel.com/content/www/us/en/ark/products/27309/mobile-intel-celeron-processor-1-20-ghz-256k-cache-400-mhz-fsb.html |