Intel Server CPU v3.1.10
Intel Xeon Processor L5318
Metadata
| Property | Value |
|---|---|
| Brand | Xeon |
| Intel name | Intel Xeon Processor L5318 |
| Processor number | L5318 |
| Codename | Clovertown |
| Generation | Core |
| Microarchitecture | Core |
| Performance class | Xeon 5000 series |
| Segment | Server |
| Released | 2007-Q12007 |
| Status | Discontinued |
| Cores | 4 |
| Base clock | 1.60 GHz |
| Cache | 8 MB L2 Cache |
| Bus | 1066 MHz |
| TDP | 40 W |
| Lithography (as published) | 65 nm |
| Transistors | 582 million |
| Die size | 286 mm2 |
| Instruction set | 64-bit |
| Socket | PLGA771LGA771 |
| Instruction sets | |
| Features | |
| Source | Intel ARK (via cpu-spec-dataset) |
Uses (dependencies)
- lithography: Intel Lithography
v12.0.0(65 nm) - simd: Intel SIMD
v0.0.1(MMX) - simd: Intel SIMD
v1.3.0(SSSE3)
Used by (0)
Nothing depends on this version.
Known vulnerabilities and defects
- Meltdown (CVE-2017-5754): Rogue data cache load: user code can read kernel memory through speculative execution.
- Spectre variant 1 (bounds check bypass) (CVE-2017-5753): Mistrained conditional branches speculatively read out-of-bounds data. Mitigated in software only; every speculative out-of-order core is affected.
Matched by codename; individual steppings may differ.
Changelog
Since the previous patch: Intel Server CPU v3.1.9 (Xeon L5310)
Features
- +Enhanced SpeedStep
- +Demand Based Switching
Specifications
- ~TDP: 50 W → 40 W
- −Recommended price: $455
Since the previous minor (lower performance class): Intel Server CPU v3.0.3 (Xeon X3230)
Breaking changes
- ~Socket changed from LGA775 to PLGA771
Features
- +Demand Based Switching
Specifications
- ~Codename: Kentsfield → Clovertown
- ~Base clock: 2.66 GHz → 1.60 GHz
- ~TDP: 95 W → 40 W
- −Recommended price: $530
Since the previous major (previous generation): Intel Server CPU v2.0.2 (Xeon LV 2.16 GHz, 2M Cache, 667 MHz FSB)
Components
Instruction sets
- +SSSE3
Features
- +Intel 64
- +Demand Based Switching
- −EPT
Specifications
- ~Codename: Sossaman → Clovertown
- ~Microarchitecture: Enhanced Pentium M → Core
- ~Cores: 2 → 4
- ~Base clock: 2.16 GHz → 1.60 GHz
- ~Cache: 2 MB L2 Cache → 8 MB L2 Cache
- ~Bus: 667 MHz → 1066 MHz
- ~TDP: 31 W → 40 W
- ~Transistors: 151 million → 582 million
- ~Die size: 90 mm2 → 286 mm2
- ~Instruction set: 32-bit → 64-bit
Raw source data
Show all 35 fields
| Field | Value |
|---|---|
| CpuId | 35129 |
| CpuName | Intel Xeon Processor L5318 |
| BornOnDate | Q1'07 |
| Bus | 1066 MHz |
| Cache | 8 MB L2 Cache |
| ClockSpeed | 1.60 GHz |
| CodeNameText | Products formerly Clovertown |
| CoreCount | 4 |
| CoreVoltage | 0.9000V-1.2500V |
| DemandBasedSwitching | Yes |
| DieSize | 286 mm2 |
| EM64 | Yes |
| Embedded | Yes |
| ExecuteDisable | Yes |
| ExtendedPageTables | No |
| FSBParity | No |
| HaltState | No |
| HyperThreading | No |
| InstructionSet | 64-bit |
| Lithography | 65 nm |
| MarketSegment | Server |
| MaxTDP | 40 W |
| PackageSize | 37.5mm x 37.5mm |
| ProcessorNumber | L5318 |
| ProductGroup | Legacy Intel Xeon Processors |
| ServicingStatus | End of Servicing Lifetime |
| SocketsSupported | PLGA771 |
| SpeedstepTechnology | Yes |
| StatusCodeText | Discontinued |
| TBTVersion | No |
| TCase | 72.2°C |
| TransistorCount | 582 million |
| TXT | No |
| VTX | Yes |
| SourceUrl | https://ark.intel.com/content/www/us/en/ark/products/35129/intel-xeon-processor-l5318-8m-cache-1-60-ghz-1066-mhz-fsb.html |