Intel Server CPU v5.2.0
Intel Xeon Processor E6510
Metadata
| Property | Value |
|---|---|
| Brand | Xeon |
| Intel name | Intel Xeon Processor E6510 |
| Processor number | E6510 |
| Codename | Nehalem EX |
| Generation | Nehalem |
| Microarchitecture | Nehalem |
| Performance class | Xeon 6000 series |
| Segment | Server |
| Released | 2010-Q12010 |
| Status | Discontinued |
| Cores | 4 |
| Threads | 8 |
| Base clock | 1.73 GHz |
| Max clock | 1.73 GHz |
| Cache | 12 MB L3 Cache |
| Bus | 4.8 GT/s |
| TDP | 105 W |
| Socket | FCLGA1567LGA1567 |
| Recommended price | $744 |
| Instruction sets | |
| Features | |
| Source | Intel ARK (via cpu-spec-dataset) |
Uses (dependencies)
- simd: Intel SIMD
v0.0.1(MMX) - simd: Intel SIMD
v1.4.1(SSE4.2)
Used by (0)
Nothing depends on this version.
Known vulnerabilities and defects
- Meltdown (CVE-2017-5754): Rogue data cache load: user code can read kernel memory through speculative execution.
- Spectre variant 1 (bounds check bypass) (CVE-2017-5753): Mistrained conditional branches speculatively read out-of-bounds data. Mitigated in software only; every speculative out-of-order core is affected.
- Foreshadow / L1 Terminal Fault (CVE-2018-3615, CVE-2018-3620, CVE-2018-3646): Speculative reads from the L1 data cache through non-present page table entries, breaking SGX, OS and VMM isolation.
- Microarchitectural Data Sampling (ZombieLoad, RIDL, Fallout) (CVE-2018-12126, CVE-2018-12127, CVE-2018-12130, CVE-2019-11091): Data in store buffers, fill buffers and load ports leaks across privilege boundaries.
Matched by codename; individual steppings may differ.
Changelog
Since the previous minor (lower performance class): Intel Server CPU v5.1.0 (Xeon E5502)
Breaking changes
- ~Socket changed from FCLGA1366 to FCLGA1567
Components
Features
- +Hyper-Threading
- −VT-d
- −Physical Address Extension
- −ECC memory
- −Demand Based Switching
Specifications
- ~Codename: Nehalem EP → Nehalem EX
- ~Cores: 2 → 4
- ~Threads: 2 → 8
- ~Base clock: 1.86 GHz → 1.73 GHz
- +Max clock: 1.73 GHz
- ~Cache: 4 MB Intel Smart Cache → 12 MB L3 Cache
- ~TDP: 80 W → 105 W
- ~Recommended price: $188 → $744
- −Max memory: 144 GB
- −Memory channels: 3
- −Max CPUs per system: 2
- −Instruction set: 64-bit
Since the previous major (previous generation): Intel Server CPU v4.2.0 (Xeon E7420)
Breaking changes
- ~Socket changed from PGA604 to FCLGA1567
Security
- !Introduced: Foreshadow / L1 Terminal Fault
- !Introduced: Microarchitectural Data Sampling (ZombieLoad, RIDL, Fallout)
Instruction sets
- +SSE4.2
Features
- +Hyper-Threading
- +EPT
- +Enhanced SpeedStep
- −Demand Based Switching
Specifications
- ~Codename: Dunnington → Nehalem EX
- ~Microarchitecture: Penryn → Nehalem
- +Threads: 8
- ~Base clock: 2.13 GHz → 1.73 GHz
- +Max clock: 1.73 GHz
- ~Cache: 8 MB L2 Cache → 12 MB L3 Cache
- ~Bus: 1066 MHz → 4.8 GT/s
- ~TDP: 90 W → 105 W
- ~Recommended price: $1,223 → $744
- −Transistors: 1900 million
- −Die size: 503 mm2
- −Instruction set: 64-bit
Raw source data
Show all 27 fields
| Field | Value |
|---|---|
| CpuId | 46488 |
| CpuName | Intel Xeon Processor E6510 |
| BornOnDate | Q1'10 |
| Bus | 4.8 GT/s |
| Cache | 12 MB L3 Cache |
| ClockSpeed | 1.73 GHz |
| ClockSpeedMax | 1.73 GHz |
| CodeNameText | Products formerly Nehalem EX |
| CoreCount | 4 |
| EM64 | Yes |
| Embedded | No |
| ExecuteDisable | Yes |
| ExpectedDiscontinuanceDate | Q4'2012 |
| ExtendedPageTables | Yes |
| HyperThreading | Yes |
| MarketSegment | Server |
| MaxTDP | 105 W |
| ProcessorNumber | E6510 |
| ProductGroup | Legacy Intel Xeon Processors |
| ServicingStatus | End of Servicing Lifetime |
| SocketsSupported | FCLGA1567 |
| SpeedstepTechnology | Yes |
| StatusCodeText | Discontinued |
| TCase | 64°C |
| ThreadCount | 8 |
| VTX | Yes |
| SourceUrl | https://ark.intel.com/content/www/us/en/ark/products/46488/intel-xeon-processor-e6510-12m-cache-1-73-ghz-4-80-gts-intel-qpi.html |