Intel CPU v7.0.6
Intel Celeron Processor 850 MHz, 128K Cache, 100 MHz FSB
patch
6
Celeron 850 MHz, 128K Cache, 100 MHz FSB
suffix
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No suffix
Metadata
| Property | Value |
|---|---|
| Brand | Celeron |
| Intel name | Intel Celeron Processor 850 MHz, 128K Cache, 100 MHz FSB |
| Codename | Coppermine |
| Generation | P6 (Pentium Pro/II/III) |
| Microarchitecture | P6 (out-of-order) |
| Performance class | Celeron |
| Segment | Desktop |
| Released | 2000-Q12000 |
| Status | Discontinued |
| Cores | 1 |
| Base clock | 850 MHz |
| Cache | 128 KB L2 Cache |
| Bus | 100 MHz |
| TDP | 25.7 W |
| Lithography (as published) | 180 nm |
| Transistors | 28 million |
| Die size | 90 mm2 |
| Instruction set | 32-bit |
| Socket | PPGA370PGA370 |
| Instruction sets | |
| Features | |
| Source | Intel ARK (via cpu-spec-dataset) |
Uses (dependencies)
- lithography: Intel Lithography
v9.0.0(180 nm) - simd: Intel SIMD
v0.0.1(MMX) - simd: Intel SIMD
v1.0.0(SSE)
Used by (0)
Nothing depends on this version.
Known vulnerabilities and defects
- Meltdown (CVE-2017-5754): Rogue data cache load: user code can read kernel memory through speculative execution.
- Spectre variant 1 (bounds check bypass) (CVE-2017-5753): Mistrained conditional branches speculatively read out-of-bounds data. Mitigated in software only; every speculative out-of-order core is affected.
Matched by codename; individual steppings may differ.
Changelog
Since the previous patch: Intel CPU v7.0.5 (Celeron 733 MHz, 128K Cache, 66 MHz FSB)
Breaking changes
- ~Socket changed from PPGA370. H-PBGA495 to PPGA370
Specifications
- ~Base clock: 733 MHz → 850 MHz
- ~Bus: 66 MHz → 100 MHz
- ~TDP: 23.6 W → 25.7 W
Since the previous major (previous generation): Intel CPU v6.0.2 (Pentium MMX)
Breaking changes
- ~Socket changed from Socket 7 to PPGA370
Security
- !Introduced: Meltdown
- !Introduced: Spectre variant 1 (bounds check bypass)
Instruction sets
- +SSE
Features
- +Physical Address Extension
- −Protected mode
- −Memory management unit
- −32-bit (IA-32)
- −Paging
- −Virtual 8086 mode
- −On-die L1 cache
- −On-die x87 FPU
- −Superscalar (dual pipeline)
- −64-bit data bus
- −Clock multiplier
- −On-die APIC
Specifications
- ~Codename: P55C → Coppermine
- ~Microarchitecture: P5 (superscalar) → P6 (out-of-order)
- +Cores: 1
- ~Base clock: 166 MHz → 850 MHz
- ~Cache: 32 KB L1 → 128 KB L2 Cache
- +Bus: 100 MHz
- +TDP: 25.7 W
- ~Transistors: 4,500,000 → 28 million
- +Die size: 90 mm2
- +Instruction set: 32-bit
- −Data width: 32-bit
- −Address width: 32-bit
- −Max clock: 233 MHz
Raw source data
Show all 35 fields
| Field | Value |
|---|---|
| CpuId | 27198 |
| CpuName | Intel Celeron Processor 850 MHz, 128K Cache, 100 MHz FSB |
| BornOnDate | Q1'00 |
| Bus | 100 MHz |
| Cache | 128 KB L2 Cache |
| ClockSpeed | 850 MHz |
| CodeNameText | Products formerly Coppermine |
| CoreCount | 1 |
| CoreVoltage | 1.70V. 1.75V |
| DemandBasedSwitching | No |
| DieSize | 90 mm2 |
| ECCMemory | No |
| EM64 | No |
| Embedded | Yes |
| ExecuteDisable | No |
| FSBParity | No |
| HaltState | No |
| HyperThreading | No |
| InstructionSet | 32-bit |
| Lithography | 180 nm |
| MarketSegment | Desktop |
| MaxTDP | 25.7 W |
| PackageSize | 49mm x 49mm |
| PhysicalAddressExtension | 32-bit |
| ProductGroup | Legacy Intel Celeron Processor |
| ServicingStatus | End of Servicing Lifetime |
| SocketsSupported | PPGA370 |
| SpeedstepTechnology | No |
| StatusCodeText | Discontinued |
| TBTVersion | No |
| TCase | 80°C |
| TransistorCount | 28 million |
| TXT | No |
| VTX | No |
| SourceUrl | https://ark.intel.com/content/www/us/en/ark/products/27198/intel-celeron-processor-850-mhz-128k-cache-100-mhz-fsb.html |