Intel CPU v7.1.0
Intel Pentium Pro
Metadata
| Property | Value |
|---|---|
| Brand | Pentium |
| Intel name | Intel Pentium Pro |
| Codename | P6 |
| Generation | P6 (Pentium Pro/II/III) |
| Microarchitecture | P6 (out-of-order) |
| Performance class | Pentium |
| Released | 1995-111995 |
| Data width | 32-bit |
| Address width | 36-bit |
| Base clock | 150 MHz |
| Max clock | 200 MHz |
| Cache | 16 KB L1, 256 KB–1 MB L2 (in package) |
| Transistors | 5,500,000 |
| Socket | Socket 8 |
| Instruction sets | |
| Features | |
| Source | Curated (historical-cpus.json) |
Uses (dependencies)
- lithography: Intel Lithography
v7.0.0(350 nm) - simd: Intel SIMD
v0.0.1(MMX) - simd: Intel SIMD
v1.0.0(SSE)
Used by (0)
Nothing depends on this version.
Known vulnerabilities and defects
- Spectre variant 1 (bounds check bypass) (CVE-2017-5753): Mistrained conditional branches speculatively read out-of-bounds data. Mitigated in software only; every speculative out-of-order core is affected.
Matched by codename; individual steppings may differ.
Changelog
Since the previous minor (lower performance class): Intel CPU v7.0.0 (Celeron (Covington))
Breaking changes
- ~Socket changed from Slot 1 to Socket 8
Security
- ✓Fixed: Meltdown
Instruction sets
- +SSE
Specifications
- ~Codename: Covington → P6
- ~Base clock: 266 MHz → 150 MHz
- ~Max clock: 300 MHz → 200 MHz
- ~Cache: 32 KB L1, no L2 → 16 KB L1, 256 KB–1 MB L2 (in package)
- ~Transistors: 7,500,000 → 5,500,000
Since the previous major (previous generation): Intel CPU v6.0.0 (Pentium (P5))
Breaking changes
- ~Socket changed from Socket 4 to Socket 8
Security
- !Introduced: Spectre variant 1 (bounds check bypass)
Components
Instruction sets
- +MMX
- +SSE
Features
- +Out-of-order execution
- +Physical Address Extension
- −Superscalar (dual pipeline)
- −64-bit data bus
Specifications
- ~Codename: P5 → P6
- ~Microarchitecture: P5 (superscalar) → P6 (out-of-order)
- ~Address width: 32-bit → 36-bit
- ~Base clock: 60 MHz → 150 MHz
- ~Max clock: 66 MHz → 200 MHz
- ~Cache: 16 KB L1 → 16 KB L1, 256 KB–1 MB L2 (in package)
- ~Transistors: 3,100,000 → 5,500,000